The present invention relates to a signal processor. More particularly, it relates to a liquid crystal display (LCD) signal processor.
U.S. Pat. No. 5,856,818 discloses a conventional construction of an LCD panel comprising: a graphic controller 1, for generating control signals (Vsync, Hsync, DE, MCLK) and data signals (DATA_EVEN, DATA_ODD), wherein the control signals include a vertical synchronizing signal Vsync, a horizontal synchronizing signal Hsync, a data enabling signal DE, and a main clock MCLK, and the data signals include an even numbered data DATA_EVEN and an odd numbered DATA_ODD; an interface device 2, for controlling a gate driver circuit 3, upper and lower data driver circuits 4 and 5 according to the control signal and the data signal from the graphic controller 1; and an LCD panel 6, which is operated by a gate driver circuit block 3 and upper and lower data driver circuit blocks 4 and 5 (see FIG. 1).
However, since the graphic controller 1 belongs to the LCD module and the interface device 2 belongs to the LCD panel, a matching interface is required.
In the design of a video-signal-input interface, typically only one video signal input is assigned. For example, in U.S. Pat. No. 5,987,543, a conventional input of video signals into notebook computers is disclosed to overcome the EMI (electromagnetic interface) generated from high-speed data transmission by using standard LVDS (low voltage differential signal) in input interface circuits. A peripheral slot is used to receive a single video signal input. The peripheral slot is serially coupled to a video port, an LVDS transmitter, an LVDS receiver, and a display device. Transition minimized differential signal (TMDS) has also been disclosed in the prior art.
U.S. Pat. No. 5,959,601 discloses a display engine used to receive video data and then determine whether the video data is to be displayed on a CRT display or an LCD display. For CRT display, the video data is routed to a digital-to-analog converter which converts the video data into analog signals that present red, green, and blue pixel information. If, however, the video data is intended to be displayed on an LCD display, the video data is provided to an LCD engine.
U.S. Pat. No. 6,025,817 discloses an allocation of signal pins. For example, in a display data channel 1,2 system, 15 pins of a 15-pin D-sub connector correspond to respective signals (a standard connector for standard VGA video output).
The prior art described above discloses that a display device uses an interface circuit to receive digital video data or analog video data, but have not disclosed a method of integrating various interface circuits to receive various types of video data and then select the desired video data. Further, the power-managing design of a conventional LCD panel construction still has room for improvement. On pages 104, 105 of a published book (ISBN 957-817-184-6) related to the most recent LCD application technique, it is described that a bias-voltage generating circuit determines a corresponding drive power by the divided voltage of a variable resistor, and therefore an active adjustment can""t be performed according to the direct current power source voltage needed in each internal device. Thus, the effect can""t be optimized.
Accordingly, to solve the above-mentioned problems, the invention provides an LCD panel signal processor applied to an LCD panel having a gate driver and a source driver, comprising: an input interface for receiving plural types of video signals; a micro-processing device for outputting a first control signal which controls the input interface to select a first type video signal from the plural types of video signals, converting the first type video signal into a digital video signal having an output format, and simultaneously sending an information signal to inform a panel controller of the output format, wherein the panel controller receives the digital video signal according to the output format and generates a gate driver signal and a source driver signal for the gate driver and the source driver.
The LCD panel signal processor further comprises a power distributor, for generating at least one direct current, wherein the power distributor is coupled to the pulse-width-modulation-signal-generating device of the micro-processing device so as to control the voltage of the direct current power source via a pulse-width-modulation signal.